TechInsights Webinar on Hybrid Bonding Technologies Nov 15-16

https://www.techinsights.com/webinar/hybrid-bonding-technology

Hybrid bonding technology is rapidly becoming a standard approach in chipmaking due to its ability to increase connection densities.
This webinar will:

• Examine different hybrid bonding approaches implemented in recent devices
• Discuss key players currently using this technology
• Look to the future of hybrid bonding, discussing potential wins – and pitfalls – to come.

This presentation compiles content from TechInsights’ subject matter experts in Memory, Image Sensor, and Logic, and from Engineers specializing in a variety of reverse engineering techniques. Many of these experts will be on hand for the live Q&A session following the presentation.

 

A preview of the topics that will be discussed:

Advanced Logic

First saw Chip on Wafer (CoW) hybrid bonding technology in the AMD Ryzen 7.

Stacking memory directly with the processor greatly increases available cache memory.

Milestone for system-technology-co-optimization (heterogeneous 3D scaling) described in the International Roadmap for Devices and Systems (IRDS) More Moore roadmap.

 

Image Sensors

We have seen Wafer-to-Wafer (W2W) stacking since 2016 from Sony.

Bond pitches as small as 2.2 µm are common, and the trend points to pitches as small as 1.4 μm.

Direct bond interconnect will ultimately enable digital pixel with in-pixel ADC and stacking of three or more wafers.

 

Memory

Hybrid bonding often used in High Bandwidth Memory (HBM) and 3D Xtacking applications.

Hybrid bonding will be one of most important high density memory enablers.

Further scaling, greater cost effectiveness, fewer defects, and solutions to thermal issues are still required.